1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to flop circuits.
2. Description of the Related Art
Integrated circuits (ICs) may utilize a wide variety of different types of storage circuits. Commonly used storage circuits include master-slave flip-flops and latch circuits. Flip-flops and latches may be widely used to provide temporary storage of data states in an IC, e.g., for storing a state of a signal in transit between a first block of combinational logic and a second block of combinational logic.
Another type of storage circuit used in ICs is a pulse flop. A pulse flop may be formed by converting a single latch circuit to perform a flip-flop function using a pulse clock having a duty cycle of less than 50%. When the pulse clock is asserted (e.g., high), the pulse flop may be transparent, and thus a logic value on an input may be received and propagated to an output. When the pulse clock is not asserted (e.g., low), the logic value input may be blocked from propagating to the output, with the previously input logic value being stored.
While pulse flops may be useful in many situations, in particularly fast signal paths, the low delay of a pulse flop can result in a race condition. More particularly, in a path having a low delay, a logic value may propagate through two or more pulse flops that are coupled together serially during the transparency phase of the pulse clock (this is sometimes referred to as the “min-delay” or “min-time” problem). This may result in erroneous operation of the IC in which the pulse flops are implemented. To overcome this problem, a standard edge-triggered master-slave flip-flop may be introduced into the signal path in place of one or more of the pulse flops.